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Si4355
5.4. Interrupts
The Si4355 is capable of generating an interrupt signal when certain events occur. The chip notifies the
microcontroller that an interrupt event has occurred by setting the nIRQ output pin LOW = 0. This interrupt signal
will be generated when any one (or more) of the interrupt events occur. The nIRQ pin will remain low until the
microcontroller reads the Interrupt Status Registers. The nIRQ output signal will then be reset until the next change
in status is detected.
The interrupt sources are grouped into three categories: packet handler, chip status, and modem. The individual
interrupts in these groups can be enabled/disabled in the interrupt property registers, 0x0101, 0x0102, and 0x0103.
An interrupt must be enabled for it to trigger an event on the nIRQ pin. The interrupt group must be enabled as well
as the individual interrupts in API property 0x0100.
Once an interrupt event occurs and the nIRQ pin is low the interrupts are read and cleared using the
GET_INT_STATUS command. By default all interrupts will be cleared once read. The instantaneous status of a
specific function may be read if the specific interrupt is enabled or disabled. The status results are provided after
the interrupts and can be read with the same commands as the interrupts. The status bits will give the current state
of the function whether the interrupt is enabled or not.
5.5. GPIO
Four General Purpose IO (GPIO) pins are available for use in the application. The GPIOs are configured using the
GPIO_PIN_CFG command. GPIO pins 0 and 1 should be used for active signals such as data or clock. GPIO pins
2 and 3 have more susceptibility to generating spurious components in the synthesizer than pins 0 and 1. The drive
strength of the GPIOs can be adjusted with the GEN_CONFIG parameter in the GPIO_PIN_CFG command. By
default, the drive strength is set to the minimum. The default configuration and the state of the GPIO during
shutdown are shown in Table 14. For a complete list of the GPIO options, please refer to the API guide application
note, “AN691: EZRadio API Guide”.
Table 14. GPIOs
Pin
GPIO0
GPIO1
GPIO2
GPIO3
nIRQ
SDO
SDI
SDN State
0
0
0
0
Resistive V DD pull-up
Resistive V DD pull-up
High Z
Rev 1.0
POR Default
POR
CTS
POR
POR
nIRQ
SDO
SDI
25
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